ASIC/Silicon Design Verification Engineer 2 (New or Recent Graduate)

 

THE ROLE:

We are looking for a new graduate or recent graduate from university to fill this position.  It is a fast paced environment with lots of room for growth.

 

We, Video HW IP/Solution Group at AMD Markham site, are looking for an ASIC/Silicon Design Verification Engineer 2 who will work in an established hardware (HW) IP team developing video encode & decode HW IP.

The role will require the candidate to initially acquire background knowledge of VCN IP HW core, HW C-model, test suite, and verification methodology. Subsequently, the candidate will be responsible to assist in developing & debugging functional and performance tests for the HW, along with corresponding design verification (DV) activities, primarily for video encode, on both a HW model & the real HW design.  You will learn the low-level details of how video encoding works, how to validate video codec algorithms and HW implementations, and how to prove that the HW functions properly.  In addition, you will work with relevant firmware (FW) engineers to add support for testing all aspects of new HW functionality & complete HW IP solution validation.  Finally, you will collaboratively consult, develop & debug with HW design teams on the final VCN HW IP solution.

 

 THE PERSON:

• An organized, enthusiastic self-motivated with a strong interest in how hardware works, how to test complex hardware designs, & verification methodologies.
• Ability to learn concepts quickly and apply what you learn in unique ways to new situations
• Be a self-starter in driving tasks to completion
• Strong problem-solving skills, and attention to detail
• Good interpersonal skills (verbal and written)
• Ability to work in a multi-discipline team and global setting as a solution enabler

 

KEY RESPONSIBILITIES:

• Work with the verification leads & and other verification team members to explore new features, develop verification plans, execute implementation of these plans to thoroughly validate both functional & HW implementation aspects of new HW features
• Assist DV lead to develop detailed functional verification test plans & performance test plans for new Video HW IP features by gaining a detailed understanding of the features & the interactions between them and existing features & how they will be used in real-world usage scenarios
• Develop test cases and complete hands-on testing, debug, and validation of all functionality using these tests on both a HW model & the actual HW design
• Leverage or adapt test libraries, emulation models, and test cases from existing IP.
• Develop, adapt, and verify IP performance tests to ensure real-world performance usecase targets are met
• Work with the ASIC HW teams (Designers, FW and SW) to debug & solve test failures at block IP & end-to-end HW levels
• Automate and improve test suite efficiency
• Achieve goal of full functional coverage of testing the HW features

 

 PREFERRED EXPERIENCE:

• Strong understanding of hardware principles including verilog RTL, test bench and HW verification
• Strong C/C++ software development experience.
• Experience debugging challenging issues and root cause analysis
• Experience with HW simulation debug using waveforms and other design verification tools.
• Scripting experience on Linux (using python, perl, csh, awk, etc.).
• Strong understanding of video codecs such as H.264/AVC & H.265/HEVC, and AV1
• Hands-on design verification experience in HW ASIC product development would be a great asset
• Prior knowledge in low-level firmware or IP testing are an excellent asset

 

 ACADEMIC CREDENTIALS:

• Minimum BSc Electrical or Computer Engineering or equivalent degree