The Title : High Speed I/O Validation Engineer

The Role : A post silicon role working on a chip to validate various features for PCIe IP. This is an exciting hands on lab role. Responsibilities will include during the pre silicon phase to come up with test plans. The AMD PCIe IP Systems Engineering Team is on the lookout for a dynamic, upbeat, System Engineer to join our growing team. As a key contributor to the success of AMD's IPs and SOCs, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry leading technologies to market. The Systems Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

The Person

Will have excellent written and verbal communication skills.

Will excel in a dynamic team working environment.

Leadership and mentoring skills a definite asset.

A self-starter and be able to independently drive tasks to completion.

Key Responsibilities

As PCIe IP Systems Engineer, you will drive the planning, verification, and debug of various hardware IP for forthcoming AMD APU, CPU, Compute and Discrete Graphics SOC programs.

Responsibilities include:

• Defining, documenting, executing and reporting the overall PCIe functional test plan and validation strategy for a set of AMD SOC's.
• Driving technical innovation to improve AMD's capabilities in IP validation, including tool and script development, technical and procedural methodology enhancement, and various internal and multi-functional technical initiatives.
• Debugging of PCIe IP and SoC issues found during pre-silicon, bring-up, system validation, and production phases of SOC programs.
• Engaging on pre-silicon verification efforts with multi-functional teams including but not limited to Design Verification (DV), Diagnostics, FPGA-based Emulation and other software/hardware modeling frameworks to ensure readiness for first silicon arrival, enablement of IP functionality, and debug of critical features.
• Leading collaborative technical discussions to drive resolution of technical issues and roll out technical initiatives.
• Low-level testing of PCIe hardware features using diagnostics, software tools, protocol/logic analyzers, oscilloscopes, and other test equipment.
• Developing knowledge of system architecture/debug and other internal IP’s.
• Supporting issues on customer platforms as requested by customer support teams.

Preferred Skill Sets :

• Experience in digital logic design/validation; verification or post-silicon verification.
• Experience with ASIC debug techniques and methodologies.
• knowledge of physical and protocol levels of common high-speed interfaces.
• Board/platform-level debug, including clock/power delivery, sequencing, analysis, and optimization.
• Strong programming/scripting skills (eg. C/C++, Ruby, Python).
• Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.
• In-depth knowledge of PC architectures/PCIe protocol an asset.

Education :

Bachelors or master’s degree in Electrical or Computer Engineering