IP RTL Design Lead 

THE ROLE:

The IO Memory Management team (IOMMU) inside NBIO organization is all about leading-edge I/O technologies. From developing high-speed next-generation PCIe and USB interconnects, to I/O virtualization technologies powering data center and machine learning work loads, these IPs touch all AMD products – CPUs, Graphics cards, and Game consoles. This team is part of the bleeding edge of development for tomorrow’s client, server, embedded, graphics, and semi-custom chips.

We are currently looking for ASIC Design/RTL Lead who will be involved in all aspects of IP  RTL design in Verilog. It involves all aspects of RTL design for a complex IP that involves creating a design strategy micro-architecture document, driving decisions with other architects while a feature is defined and doing the hands-on RTL coding. The candidate will work closely with the verification engineers to make sure his IP/Feature is verified to production quality and later work closely with the post silicon/Software teams to ensure the IP is deployed successfully to multiple AMD products.

THE PERSON : 

• Will demonstrate strong analytical thinking and problem solving skills with an excellent attention to detail
• Will have good communication and writing skills
• Will have good teamwork and interpersonal skills

EDUCATION: Electrical or Computer Engineering