Datacenter Accelerator Hardware Validation Systems Design Engineer
THE ROLE:
The Datacenter Accelerated Computing Validation Team is looking for dynamic and energetic engineers to join our growing team. As a key contributor to the bring-up and validation of AMD’s GPU based datacenter accelerators, you will work in cross-functional teams (HW, SW, Design) to ensure functionality and quality of SOC designs. These technologies will deliver industry leading products for Machine Learning and High-Performance Computing applications. The Validation Team fosters continuous technical innovation to showcase successes as well as facilitate continuous career development. This role will focus on the validation of graphics and compute IP within the processors, targeting features and operations supported by each, and developing standalone exercisers.
THE PERSON:
A strong technical leader capable in test content creation and execution of silicon validation. Six or more years of relevant experience exhibiting end-to-end ownership in cross-functional problem solving. You should feel comfortable to be hands-on with datacenter platforms and to work in the labs for test or debug. You will be required to drive technical deep dives into SOC IP designs as well as working at a system/platform level.
KEY RESPONSIBILITIES:
As a Domain Engineer, you will work on all aspects of SOC validation from pre-silicon planning and emulation, to post-silicon bring-up, validation, and debug. The focus will be on testing the graphics and compute IP within processors, targeting features and operations supported by each, and developing our own standalone exercisers when appropriate.
Responsibilities include:
IDEAL CANDIDATE
ACADEMIC CREDENTIALS:
Job ID: 32157
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